Clock Domain Crossing Analysis of a SpaceWire IP-Core

Abstract

In recent years, the use of multiple clocks inside a single IC has grown rapidly to boost performance. This change comes with unique challenges regarding the data transfer from one clock domain to another, due to different frequencies colliding. Therefore, it is necessary to ensure that data crosses the clock domain boundary correctly. The aim of this paper is to find and if possible correct clock domain crossing (CDC) violation inducing parts of an open source SpaceWire IP-core, that is used for developing projects in FPGAs. The IP-core has shown anomalies in a code review, that could cause CDC errors.

The paper first introduces the concept of CDC and describes several synchronizers used to solve the problem. After looking at detection methods, the SpaceWire protocol is described. With this basis, we take a look at the analyzed SpaceWire IP-core and its synchronizers, as well as the Questa CDC tool. To find the CDC error inducing parts, a static CDC analysis is performed with Questa CDC, which is part of the Siemens verification suite. The tool found six violations, which were analyzed manually. Finally, corrections were made to the IP-core where necessary, and one usage restriction was found.