Implementierung von FIR-Filtern in einem FPGA mit Vergleich zwischen manuell optimiertem und automatisch generiertem Code

Kurzfassung

Modern robotic systems contain a steadily increasing number of sensors to provide data for closed- and open-loop control. The analog signals of sensors are usually low-power and noisy. Since most of the controllers are digital, the sensor data has to be amplified, digitized and filtered in order to serve as reliable control signal. These signal processing tasks are generally executed by amplifiers, analogue digital converters as well as various analog and digital filters. As hardware for digital filters Field Programmable Gate Arrays (FPGAs) receive a increasingly important role. Which is due to the wide selection of signal processing hardware code generators which promise a fast and simple implementation of digital signal processing algorithms on FPGAs. This thesis deals with the task of bringing a universal analogue digital converter board into service. Draw-wire sensors, which are used in the anthropomorphic robot David of the Institute of Robotics and Mechatronics of the German Aerospace Center, serve as an example application. The development of a generic Finite Impulse Response (FIR) filter code in Very High Speed Integrated Circuit Hardware Description Language (VHDL) is presented and synthesized for the on-board FPGA. In a final comparison between manually optimized hardware description and the automatically generated hardware description from different code generators, the developed code was able to achieve good results. In many cases, the generically implemented code can be synthesized with approximately 50% less logic elements than the automatically generated code.