Bihler, Markus and Bahls, Thomas (2018) Efficient Implementation of On-Chip Communication Optimized for SpaceWire Networks. In: Proceedings of the 8th International SpaceWire Conference 2018, pp. 113-117. STAR-Dundee Ltd. International SpaceWire Conference, Long Beach, USA. ISBN 978-0-9954530-1-2.
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Official URL: http://2018.spacewire-conference.org/proceedings/
Abstract
SpaceWire has been used successfully as commu- nication backbone implemented on Field Programmable Gate Arrays (FPGAs) in several robotic systems at the DLR. However, the growing number of available System-on-Chip (SoC) solutions with integrated programmable logic and the demand for efficient processing power in embedded systems require high speed On- Chip communication. Using SpaceWire as interconnection bus inside FPGAs has a major drawback compared to dedicated On-Chip bus systems. As it is not designed to exploit the wide parallelism of FPGAs, several On-Chip communication standards outperform SpaceWire in terms of bandwidth and resource costs. Examples are the AMBA AXI bus, the Avalon bus, CoreConnect or the Wishbone SoC Interconnection. In this work, the Wishbone standard is used to show, how an FPGA system connected to a SpaceWire network can benefit from a dedicated On-Chip bus. The architecture of the Wishbone standard allows an almost seamless integration into a SpaceWire network. Essential parts of SpaceWire, like package oriented communication or time- code distribution, can be mapped onto the Wishbone standard. A slim protocol is presented to allow accessing the On-Chip address space from the SpaceWire network and vice versa. It is also shown, that a heterogeneous On-Chip network consisting of SpaceWire and Wishbone occupies less resources on an FPGA than a similar network implemented with SpaceWire only. In the future, this approach can be used to integrate SoCs with built-in programmable logic into a SpaceWire network.
Item URL in elib: | https://elib.dlr.de/120403/ | |||||||||
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Document Type: | Conference or Workshop Item (Speech) | |||||||||
Title: | Efficient Implementation of On-Chip Communication Optimized for SpaceWire Networks | |||||||||
Authors: |
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Date: | 14 May 2018 | |||||||||
Journal or Publication Title: | Proceedings of the 8th International SpaceWire Conference 2018 | |||||||||
Refereed publication: | Yes | |||||||||
Open Access: | No | |||||||||
Gold Open Access: | No | |||||||||
In SCOPUS: | No | |||||||||
In ISI Web of Science: | No | |||||||||
Page Range: | pp. 113-117 | |||||||||
Editors: |
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Publisher: | STAR-Dundee Ltd | |||||||||
ISBN: | 978-0-9954530-1-2 | |||||||||
Status: | Published | |||||||||
Keywords: | SpaceWire, On-Chip, Wishbone | |||||||||
Event Title: | International SpaceWire Conference | |||||||||
Event Location: | Long Beach, USA | |||||||||
Event Type: | international Conference | |||||||||
HGF - Research field: | Aeronautics, Space and Transport | |||||||||
HGF - Program: | Space | |||||||||
HGF - Program Themes: | Space System Technology | |||||||||
DLR - Research area: | Raumfahrt | |||||||||
DLR - Program: | R SY - Space System Technology | |||||||||
DLR - Research theme (Project): | R - Medical Assistance Systems [SY], R - Lightweight Robotics [SY] | |||||||||
Location: | Oberpfaffenhofen | |||||||||
Institutes and Institutions: | Institute of Robotics and Mechatronics (since 2013) > Mechatronic Systems | |||||||||
Deposited By: | Bihler, Markus | |||||||||
Deposited On: | 28 Nov 2018 11:08 | |||||||||
Last Modified: | 28 Nov 2018 11:08 |
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