A simulation based approach for automated feature localization

Abstract

The complexity of modern chips is rapidly increasing. To fulfill tight time-to-market constraints, more and more blocks from previous designs are reused or third party IP blocks are licensed. However, such blocks are often only poorly documented making adjustments to the blocks a difficult task. This paper presents a technique for automatic feature localization for hardware designs. Our approach helps a developer in understanding a design by localizing parts of the code which implement a certain feature of interest. We evaluate the approach on three open source designs. For those designs, our approach yields a more precise localization of the code implementing the different features than the documentation of the design.