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RECONFIGURABLE LOW POWER ARCHITECTURE FOR FAULT TOLERANT PSEUDO-RANDOM NUMBER GENERATION

SAVIĆ, NEMANJA and STOJČEV, MILE and NIKOLIĆ, TATJANA and PETROVIĆ, VLADIMIR and JOVANOVIĆ, GORAN (2014) RECONFIGURABLE LOW POWER ARCHITECTURE FOR FAULT TOLERANT PSEUDO-RANDOM NUMBER GENERATION. Journal of Circuits, Systems and Computers, 23 (01). World Scientific Publishing Co. DOI: 10.1142/S0218126614500029 ISSN 0218-1266

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Official URL: http://www.worldscientific.com/doi/abs/10.1142/S0218126614500029


Item URL in elib:https://elib.dlr.de/91576/
Document Type:Article
Title:RECONFIGURABLE LOW POWER ARCHITECTURE FOR FAULT TOLERANT PSEUDO-RANDOM NUMBER GENERATION
Authors:
AuthorsInstitution or Email of AuthorsAuthors ORCID iD
SAVIĆ, NEMANJAnemanja.savic (at) dlr.deUNSPECIFIED
STOJČEV, MILEIHPUNSPECIFIED
NIKOLIĆ, TATJANAIHPUNSPECIFIED
PETROVIĆ, VLADIMIRIHPUNSPECIFIED
JOVANOVIĆ, GORANIHPUNSPECIFIED
Date:January 2014
Journal or Publication Title:Journal of Circuits, Systems and Computers
Refereed publication:Yes
Open Access:No
Gold Open Access:No
In SCOPUS:Yes
In ISI Web of Science:Yes
Volume:23
DOI :10.1142/S0218126614500029
Publisher:World Scientific Publishing Co
ISSN:0218-1266
Status:Published
Keywords:pseudo-random generator, LFSR, fault tolerance, reconfiguration, low power
HGF - Research field:Aeronautics, Space and Transport
HGF - Program:Transport
HGF - Program Themes:Transport System
DLR - Research area:Transport
DLR - Program:V VS - Verkehrssystem
DLR - Research theme (Project):V - Urbane Mobilität (old)
Location: Berlin-Adlershof
Institutes and Institutions:Institute of Transportation Systems > Verkehrsdatenerfassung
Deposited By: Luber, Dr. Andreas
Deposited On:10 Nov 2014 13:26
Last Modified:06 Sep 2019 15:30

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