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Große, Daniel and Fey, Görschwin and Drechsler, Rolf (2013) Enhanced Formal Verification Flow for Circuits Integrating Debugging and Coverage Analysis. Electronic Communications of the EASST, 62, pp. 1-14. European Association of Software Science and Technology. ISSN 1863-2122.
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Official URL: http://journal.ub.tu-berlin.de/eceasst/article/view/860
| Item URL in elib: | https://elib.dlr.de/86962/ | ||||||||||||||||
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| Document Type: | Article | ||||||||||||||||
| Title: | Enhanced Formal Verification Flow for Circuits Integrating Debugging and Coverage Analysis | ||||||||||||||||
| Authors: |
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| Date: | 2013 | ||||||||||||||||
| Journal or Publication Title: | Electronic Communications of the EASST | ||||||||||||||||
| Refereed publication: | Yes | ||||||||||||||||
| Open Access: | Yes | ||||||||||||||||
| Gold Open Access: | Yes | ||||||||||||||||
| In SCOPUS: | Yes | ||||||||||||||||
| In ISI Web of Science: | No | ||||||||||||||||
| Volume: | 62 | ||||||||||||||||
| Page Range: | pp. 1-14 | ||||||||||||||||
| Publisher: | European Association of Software Science and Technology | ||||||||||||||||
| ISSN: | 1863-2122 | ||||||||||||||||
| Status: | Published | ||||||||||||||||
| Keywords: | Funktional Verifikation, Hardware-Entwurf, Vollständigkeit, Debugging | ||||||||||||||||
| HGF - Research field: | Aeronautics, Space and Transport | ||||||||||||||||
| HGF - Program: | Space | ||||||||||||||||
| HGF - Program Themes: | Space System Technology | ||||||||||||||||
| DLR - Research area: | Raumfahrt | ||||||||||||||||
| DLR - Program: | R SY - Space System Technology | ||||||||||||||||
| DLR - Research theme (Project): | R - Core Avionics (old) | ||||||||||||||||
| Location: | Bremen | ||||||||||||||||
| Institutes and Institutions: | Institute of Space Systems > Avionics Systems | ||||||||||||||||
| Deposited By: | Fey, Görschwin | ||||||||||||||||
| Deposited On: | 09 Jan 2014 11:10 | ||||||||||||||||
| Last Modified: | 16 Jul 2026 12:48 |
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