L-DACS1 Laboratory Demonstrator Development and Compatibility Measurement Set-up

Kurzfassung

The Future Communications Infrastructure (FCI) comprises a set of data link technologies for aeronautical communications. For the airport, a data link technology dubbed AeroMACS is currently developed within NextGen and SESAR which is strongly based on the WiMAX standard. ESA initiated the development of a future satellite-based communications system for aviation within their ESA Iris program, supplemented by work performed within SESAR. For air/ground communications, currently two candidate systems are under consideration – L-DACS1 and L-DACS2. Whereas L-DACS1 is a broadband system employing Orthogonal Frequency-Division Multiplexing (OFDM) as modulation scheme and frequency-division duplex (FDD), L-DACS2 is a narrowband single-carrier system utilizing time-division duplex (TDD). The final decision on L-DACS will be based on a set of evaluation criteria including laboratory prototype testing of L-DACS with respect to L-band compatibility. Current work on L-DACS is performed under the framework of SESAR. The corresponding SESAR project P15.2.4 „Future Mobile Data Link System Definition“ has started activities on L-DACS within an Early Task mid of February this year. Main goals of this Early Task are the refinement of L-DACS specifications, the development of evaluation criteria for L-band compatibility testing, and the set-up for the L-DACS evaluation. Besides the SESAR activities, DLR has already started to implement an L-DACS1 physical layer laboratory demonstrator in FPGA technology based on the current L-DACS1 specification. The demonstrator enables investigations of both the influence of the L-DASC1 waveform on the legacy L-band systems and the interference of the legacy L-band systems on the L-DACS1 receiver. These investigations are especially of interest for the so-called “inlay” deployment scenario, where L-DACS1 and DME share the L-band as common spectrum resource by implementing L-DACS1 channels of approximately 500 kHz bandwidth between two adjacent DME channels. Since the proof of L-band compatibility is the main scope of the L-DACS1 demonstrator, the focus is on the physical layer implementation in FPGA technology. The demonstrator set-up comprises a complete implementation of the physical layer of the L-DACS1 transmitter, including adaptive coding and modulation as well as the complete framing structure for forward and reverse link. The L-DACS1 receiver is implemented only partly in hardware. Mainly sampling and digital down-conversion followed by fast data storage are realized, i.e. a data grabber function. The subsequent receiver tasks, like synchronization, interference mitigation, channel estimation/equalization, decoding, and demodulation are realized in software. This concept allows rapid demonstrator set-up and high flexibility for receiver optimization. Recent results on L-DACS1 receiver optimization have been presented at last year’s DASC. The L-DACS1 physical layer laboratory demonstrator is finalized up to the intermediate frequency (IF) stage and the Radio Frequency (RF) frontend shall be available by May this year. First L-band compatibility tests at the labs of the German ATC authority DFS are scheduled for June/July this year. These tests will consider the outcomes from the SESAR project P15.2.4 with respect to the evaluation criteria. In addition, the L-DACS1 physical layer laboratory demonstrator will be adjusted to the L-DACS1 specification refinements as proposed by SESAR before testing. In the final paper, a short overview of the L-DACS1 system is presented followed by a description of the demonstrator concept. Moreover, the measurement set-up is presented in detail describing the different L-band compatibility tests performed at the DFS labs. Finally, measurement results are presented and a first evaluation of the L-band compatibility of L-DACS1 is given.