Minimization of the Tracking Error in a GNSS Receiver

Abstract

A method is presented to design chip pulse shapes for a pseudo random noise (PN) sequence which are absolutely bandlimited, mainly concentrated in the chip duration and that minimize the tracking error variance for a coherent delay lock loop (DLL) as used in a navigation receiver. This low complexity optimization method is based on the prolate spheroidal wave functions (PSWF) which allow to transform the variational problem at hand into a tractable parametric optimization problem. It is shown, that the designed optimum chip pulse shape for the reference PN sequence improves the performance of a coherent DLL by means of the root-mean square (RMS) tracking error compared to the conventionally used rectangular chip pulse shape. The proposed design approach for chip pulse shapes in order to optimize tracking performance of a navigation receiver introduces a general method for signal design of direct sequence code division multiple access (DS-CDMA) signals and especially for Global Navigation Satellite Systems (GNSS) like GPS or the European Galileo system.