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A Scaleable and Low Power High Performance On-board Data Processing System Including Solid State Mass Memory

Venus, H. (1996) A Scaleable and Low Power High Performance On-board Data Processing System Including Solid State Mass Memory. In: Proc. of the IAA Symposium on Small Satellites for Earth Observation, pp. 188-191. IAA-Symposium on Small Satellites for Earth Observation, Berlin, 04.-08.11.1996.

Full text not available from this repository.

Abstract

Berlin 121296.

Item URL in elib:https://elib.dlr.de/35656/
Document Type:Conference or Workshop Item (Paper)
Additional Information: LIDO-Berichtsjahr=1996, pages=4,
Title:A Scaleable and Low Power High Performance On-board Data Processing System Including Solid State Mass Memory
Authors:
AuthorsInstitution or Email of AuthorsAuthors ORCID iD
Venus, H.UNSPECIFIEDUNSPECIFIED
Date:1996
Journal or Publication Title:Proc. of the IAA Symposium on Small Satellites for Earth Observation
Open Access:No
Gold Open Access:No
In SCOPUS:No
In ISI Web of Science:No
Page Range:pp. 188-191
Series Name:IAA-B-0608P
Status:Published
Keywords:PCI-bus, low power, RICS processor, multi chip modules (MCM)
Event Title:IAA-Symposium on Small Satellites for Earth Observation, Berlin, 04.-08.11.1996
HGF - Research field:UNSPECIFIED
HGF - Program:Space (old)
HGF - Program Themes:W EO - Erdbeobachtung
DLR - Research area:UNSPECIFIED
DLR - Program:W EO - Erdbeobachtung
DLR - Research theme (Project):UNSPECIFIED
Location: Berlin-Adlershof
Institutes and Institutions:Institute of Planetary Research > Institut für Weltraumsensorik
Deposited By: DLR-Beauftragter, elib
Deposited On:02 Apr 2006
Last Modified:27 Apr 2009 10:00

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