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Design and Development of a High Performance Digital Signal Processing Configuration for a Realtime Synthetic Aperture Radar (SAR) Processor.

Desai, N.M. and Spielbauer, R. and Moreira, A. (1995) Design and Development of a High Performance Digital Signal Processing Configuration for a Realtime Synthetic Aperture Radar (SAR) Processor. DLR-Interner Bericht. 551-3/95, 100 S.

Full text not available from this repository.

Abstract

This report describes the design and development details of a high performance digital signal processing hardware configuration based on SHARP's LH 9124/LH 9320 DSP chip-set and the software utility package developed to generate programming details for this DSP chip-set.

Item URL in elib:https://elib.dlr.de/33227/
Document Type:Monograph (DLR-Interner Bericht)
Additional Information: LIDO-Berichtsjahr=1995,
Title:Design and Development of a High Performance Digital Signal Processing Configuration for a Realtime Synthetic Aperture Radar (SAR) Processor.
Authors:
AuthorsInstitution or Email of AuthorsAuthors ORCID iD
Desai, N.M.UNSPECIFIEDUNSPECIFIED
Spielbauer, R.UNSPECIFIEDUNSPECIFIED
Moreira, A.UNSPECIFIEDUNSPECIFIED
Date:1995
Open Access:No
Gold Open Access:No
In SCOPUS:No
In ISI Web of Science:No
Number of Pages:100
Status:Published
Keywords:Remote Sensing, SAR, Real Time Processing
HGF - Research field:UNSPECIFIED
HGF - Program:Space (old)
HGF - Program Themes:W EO - Erdbeobachtung
DLR - Research area:UNSPECIFIED
DLR - Program:W EO - Erdbeobachtung
DLR - Research theme (Project):UNSPECIFIED
Location: Oberpfaffenhofen
Institutes and Institutions:Institut für Hochfrequenztechnik
Deposited By: DLR-Beauftragter, elib
Deposited On:02 Apr 2006
Last Modified:27 Apr 2009 09:00

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