Entwurf einer integrierten Prozessoreinheit für einen UAV-Flugsteuerungsrechner

Kurzfassung

The German Aerospace Center (DLR) develops and operates a large fleet of unmanned aerial vehicles (UAVs), which are equipped with a flight control computer to ensure safe flight operations. As part of this thesis, a potential modular computer architecture for use in unmanned aerial vehicles is designed based on the VPX industry standard, taking into account the specific requirements for deployment in the DLRs high-altitude platform. A central component is the single-board computer, a modular processor board, the development of which forms the main part of this thesis. Based on the requirements for the computer system and current industry trends, an ANSI/VITA 65.0 OpenVPX slot and module profile with SOSA compatibility is selected and the communication interfaces defined. In the mechanical design of the processor board, a conduction-cooled housing in the VPX 3U-S form factor is designed, and its ability to dissipate the thermal design power under full load is verified using simulations. By using a modified ANSI/VITA 57.1 FMC daughterboard, the interfaces of the single-board computer can be flexibly expanded; however, this means that the underlying standard is not met in a few aspects. As part of the circuit board design process, all necessary subsystems are designed, as required by the OpenVPX standard or needed for operation of the central AMD Xilinx Zynq UltraScale+ MPSoC processor. These include, amongst others, a dedicated power management system, an independent platform management system, and the integration of DDR4 memory. With an externally accessible debug interface offering extensive system access, the processor card possesses features not offered by commercially available processor cards. The designed circuit diagram is then converted into a prototype board design, for which a layer stack-up was defined and key aspects such as the signal integrity of the high-speed interfaces were taken into account. Finally, follow-up work required for the successful commissioning of the processor board is presented.