Integrated Serverless Avionics: Next Generation Architecture for Airborne Software

Abstract

The Integrated Modular Avionics (IMA) architecture is widely adopted in modern aircraft to improve Size, Weight, Power and Cost (SWAP-C); this is achieved by consolidating multiple applications onto shared computing resources. However, modern processors, particularly Multi-Core Processors (MCPs), present significant challenges to traditional implementations, such as those following ARINC 653. These processors, with their inherent complexity and interference channels hinder predictability; consequently, robust temporal isolation, as mandated by AMC 20-170, is increasingly difficult to guarantee. This work investigates an alternative architectural direction, inspired by serverless computing principles, originating from a re-evaluation of foundational IMA design choices of the 1990s. We propose an architecture that shifts control to the system integrator; it replaces the monolithic model of stateful partitions with a compositional one, using granular, stateless Tasks that terminate rather than suspend at the end of their time window. Tasks follow a functional restart model: receiving input data prior to execution, returning output data upon termination, implementing a data-flow oriented communication to minimize Operating System (OS) interactions. These properties simplify functional testing and verification, offering a potential solution to the limitations of traditional black-box partitioning when managing interference on modern processors in avionics. This approach enhances predictability and simplifies the reduction of interference between applications negatively impacting each other. In that, it complies with common recommendations to mitigate interference effects not only on MCPs but also for Single-Core Processors (SCPs).