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Accelerating the FlowSimulator: Speeding up the HPC codes used at DLR

Huismann, Immo and Krzikalla, Olaf and Tschüter, Ronny (2025) Accelerating the FlowSimulator: Speeding up the HPC codes used at DLR. High-Performance Computing and Networking, 2025-06-24, Göttingen.

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Item URL in elib:https://elib.dlr.de/215556/
Document Type:Conference or Workshop Item (Speech)
Title:Accelerating the FlowSimulator: Speeding up the HPC codes used at DLR
Authors:
AuthorsInstitution or Email of AuthorsAuthor's ORCID iDORCID Put Code
Huismann, ImmoImmo.Huismann (at) dlr.dehttps://orcid.org/0009-0008-5827-9266UNSPECIFIED
Krzikalla, OlafOlaf.Krzikalla (at) dlr.deUNSPECIFIEDUNSPECIFIED
Tschüter, RonnyRonny.Tschueter (at) dlr.deUNSPECIFIEDUNSPECIFIED
Date:June 2025
Refereed publication:No
Open Access:No
Gold Open Access:No
In SCOPUS:No
In ISI Web of Science:No
Status:Published
Keywords:CODA; TRACE; HPC; Spliss; GPGPU
Event Title:High-Performance Computing and Networking
Event Location:Göttingen
Event Type:Workshop
Event Date:24 June 2025
HGF - Research field:Aeronautics, Space and Transport
HGF - Program:Aeronautics
HGF - Program Themes:Efficient Vehicle
DLR - Research area:Aeronautics
DLR - Program:L EV - Efficient Vehicle
DLR - Research theme (Project):L - Virtual Aircraft and  Validation
Location: Dresden
Institutes and Institutions:Institute of Software Methods for Product Virtualization > High Perfomance Computing
Deposited By: Huismann, Immo
Deposited On:28 Jul 2025 15:45
Last Modified:26 May 2026 08:18

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