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Development Of A Checkpointing Implementation On A Xilinx Zynq FPGA For Space Applications

Wald, Stephan (2023) Development Of A Checkpointing Implementation On A Xilinx Zynq FPGA For Space Applications. Bachelor's, Hochschule für Technik und Wirtschaft Berlin.

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Abstract

Systems that are launched into space encounter different environmental influences than on earth. And they need ways to deal with them. Different techniques and technologies are used to deal with the effects of those influences. The German Aerospace Center (DLR) is currently working on a project which aims to build reliable on-board computer systems on the basis of a Xilinx Zynq hardware platform. The idea is a distributed system, consisting of several computational nodes that can overcome the challenges this harsh environment poses on it. One of techniques used is the reset and reconfiguration of single nodes. To reduce downtime of failed system components computational progress will be periodically saved, creating checkpoints. The target platform for the nodes is a combination of processor and configurable hardware attached to it. Checkpoints, created by the software, shall be stored in the systems hardware to make them non volatile against resets of the software.

The goal of this work is to explore options for hardware implementations storing these checkpoints and providing them to the software after reset. In chapter 1 the context of this work is explored, explaining the project and the ideas behind it. Outlining the concrete problem and approaches to solve it. Chapter 2 addresses the ideas of possible implementations. Requirements and the designs following them are discussed. The process of implementing different design approaches is described in chapter 3. Together with measurements comparing their performance and use of resources. Finally, in chapter 4, the work is evaluated. Comparing the different approaches for suitability and discussing possible next steps.

Item URL in elib:https://elib.dlr.de/203099/
Document Type:Thesis (Bachelor's)
Title:Development Of A Checkpointing Implementation On A Xilinx Zynq FPGA For Space Applications
Authors:
AuthorsInstitution or Email of AuthorsAuthor's ORCID iDORCID Put Code
Wald, StephanHochschule für Technik und Wirtschaft BerlinUNSPECIFIEDUNSPECIFIED
Date:March 2023
Open Access:No
Number of Pages:28
Status:Published
Keywords:FPGA, Checkpointing
Institution:Hochschule für Technik und Wirtschaft Berlin
HGF - Research field:Aeronautics, Space and Transport
HGF - Program:Space
HGF - Program Themes:Space System Technology
DLR - Research area:Raumfahrt
DLR - Program:R SY - Space System Technology
DLR - Research theme (Project):R - ScOSA Flight Experiment
Location: Braunschweig
Institutes and Institutions:Institute of Software Technology
Deposited By: Brömer, Fiona
Deposited On:06 Mar 2024 08:58
Last Modified:06 Mar 2024 08:58

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