Damião Almeida, Danilo und Bragança, Lucas und Sill Torres, Frank und Ferreira, Ricardo und Nacif, José Augusto (2021) HAMBug: A Hybrid CPU-FPGA System to Detect Race Conditions. IEEE Transactions on Circuits and Systems II: Express Briefs, 68 (9), 3158 -3162. IEEE - Institute of Electrical and Electronics Engineers. doi: 10.1109/TCSII.2021.3093985. ISSN 1549-7747.
Dies ist die aktuellste Version dieses Eintrags.
PDF
- Nur DLR-intern zugänglich
- Verlagsversion (veröffentlichte Fassung)
1MB |
Offizielle URL: https://ieeexplore.ieee.org/document/9469913
Kurzfassung
The evolution of computer algorithms and micro-architectures continuously leads to novel applications and solutions that explore modern computers potential. A drawback of this development is the rising complexity of hardware-oriented tests during software development. This brief proposes Hambug, a method to support developers during software testing of parallel applications in CPU-FPGA environments. The main component is a run-time memory analyzer that employs shared channels. Thus, Hambug enables memory analysis of parallel applications without influencing the CPU using a hardware-based debug module. Experimental results indicate that this method presents lower slowdown compared with modern dynamic analysis tools.
elib-URL des Eintrags: | https://elib.dlr.de/143724/ | ||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Dokumentart: | Zeitschriftenbeitrag | ||||||||||||||||||||||||
Titel: | HAMBug: A Hybrid CPU-FPGA System to Detect Race Conditions | ||||||||||||||||||||||||
Autoren: |
| ||||||||||||||||||||||||
Datum: | 1 Juli 2021 | ||||||||||||||||||||||||
Erschienen in: | IEEE Transactions on Circuits and Systems II: Express Briefs | ||||||||||||||||||||||||
Referierte Publikation: | Ja | ||||||||||||||||||||||||
Open Access: | Nein | ||||||||||||||||||||||||
Gold Open Access: | Nein | ||||||||||||||||||||||||
In SCOPUS: | Ja | ||||||||||||||||||||||||
In ISI Web of Science: | Ja | ||||||||||||||||||||||||
Band: | 68 | ||||||||||||||||||||||||
DOI: | 10.1109/TCSII.2021.3093985 | ||||||||||||||||||||||||
Seitenbereich: | 3158 -3162 | ||||||||||||||||||||||||
Verlag: | IEEE - Institute of Electrical and Electronics Engineers | ||||||||||||||||||||||||
ISSN: | 1549-7747 | ||||||||||||||||||||||||
Status: | veröffentlicht | ||||||||||||||||||||||||
Stichwörter: | Parallel computing FPGA heterogeneous architectures software validation | ||||||||||||||||||||||||
HGF - Forschungsbereich: | keine Zuordnung | ||||||||||||||||||||||||
HGF - Programm: | keine Zuordnung | ||||||||||||||||||||||||
HGF - Programmthema: | keine Zuordnung | ||||||||||||||||||||||||
DLR - Schwerpunkt: | keine Zuordnung | ||||||||||||||||||||||||
DLR - Forschungsgebiet: | keine Zuordnung | ||||||||||||||||||||||||
DLR - Teilgebiet (Projekt, Vorhaben): | keine Zuordnung | ||||||||||||||||||||||||
Standort: | Bremerhaven | ||||||||||||||||||||||||
Institute & Einrichtungen: | Institut für den Schutz maritimer Infrastrukturen > Resilienz Maritimer Systeme | ||||||||||||||||||||||||
Hinterlegt von: | Sill Torres, Dr. Frank | ||||||||||||||||||||||||
Hinterlegt am: | 13 Sep 2021 13:02 | ||||||||||||||||||||||||
Letzte Änderung: | 13 Sep 2021 13:02 |
Verfügbare Versionen dieses Eintrags
- HAMBug: A Hybrid CPU-FPGA System to Detect Race Conditions. (deposited 13 Sep 2021 13:02) [Gegenwärtig angezeigt]
Nur für Mitarbeiter des Archivs: Kontrollseite des Eintrags