WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach

Derrien, Steven and Puaut, Isabelle and Alefragis, Panayiotis and Bednara, Marcus and Bucher, Harald and David, Clement and Debray, Yann and Durak, Umut and Fassi, Imen and Ferdinand, Christian and Hardy, Damien and Kritikakou, Angeliki and Rauwerda, Gerard and Reder, Simon and Sicks, Martin and Stripf, Timo and Sunesen, Kim and ter Braak, Timon and Voros, Nikolaos S. and Becker, Jürgen (2017) WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach. In: 20th Design, Automation and Test in Europe, DATE 2017. 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017-03-27 - 2017-03-31, Lausanne, Switzerland. doi: 10.23919/DATE.2017.7927000.

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Abstract

Parallel architectures are nowadays not only confined to the domain of high performance computing, they are also increasingly used in embedded time-critical systems. The ARGO H2020 project1 provides a programming paradigm and associated tool flow to exploit the full potential of architectures in terms of development productivity, time-to-market, exploitation of the platform computing power and guaranteed real-time performance. In this paper we give an overview of the objectives of ARGO and explore the challenges introduced by our approach.

Item URL in elib:

https://elib.dlr.de/112668/

Document Type:

Conference or Workshop Item (Speech)

Title:

WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach

Authors:

Authors	Institution or Email of Authors	Author's ORCID iD	ORCID Put Code
Derrien, Steven	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Puaut, Isabelle	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Alefragis, Panayiotis	echnological educational institute of western greece	UNSPECIFIED	UNSPECIFIED
Bednara, Marcus	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Bucher, Harald	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
David, Clement	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Debray, Yann	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Durak, Umut	UNSPECIFIED	https://orcid.org/0000-0002-2928-1710	UNSPECIFIED
Fassi, Imen	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Ferdinand, Christian	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Hardy, Damien	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Kritikakou, Angeliki	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Rauwerda, Gerard	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Reder, Simon	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Sicks, Martin	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Stripf, Timo	emtrix	UNSPECIFIED	UNSPECIFIED
Sunesen, Kim	recore systems	UNSPECIFIED	UNSPECIFIED
ter Braak, Timon	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Voros, Nikolaos S.	echnological educational institute of western greece	UNSPECIFIED	UNSPECIFIED
Becker, Jürgen	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED

Date:

2017

Journal or Publication Title:

20th Design, Automation and Test in Europe, DATE 2017

Refereed publication:

Yes

Open Access:

Yes

Gold Open Access:

In SCOPUS:

Yes

In ISI Web of Science:

DOI:

10.23919/DATE.2017.7927000

Status:

Published

Keywords:

Program processors, Programming, Real-time systems, Multicore processing, Hardware, Estimation

Event Title:

2017 Design, Automation & Test in Europe Conference & Exhibition (DATE)

Event Location:

Lausanne, Switzerland

Event Type:

international Conference

Event Start Date:

27 March 2017

Event End Date:

31 March 2017

HGF - Research field:

Aeronautics, Space and Transport

HGF - Program:

Aeronautics

HGF - Program Themes:

fixed-wing aircraft

DLR - Research area:

Aeronautics

DLR - Program:

L AR - Aircraft Research

DLR - Research theme (Project):

L - Simulation and Validation (old)

Location:

Braunschweig

Institutes and Institutions:

Institute of Flight Systems > Flight Dynamics and Simulation

Deposited By:

Durak, Umut

Deposited On:

12 Dec 2017 15:07

Last Modified:

24 Apr 2024 20:17

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