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Turbo Code Design for Short Blocks

Jerkovits, Thomas and Matuz, Balazs (2016) Turbo Code Design for Short Blocks. ASMS 2016, 5-7 Sep 2016, Palma de Mallorca, Spain.

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Abstract

This work considers the design of short parallel turbo codes (PTC) with block lengths in the order of (a few) hundred code bits. In particular we aim at designing codes with large minimum distance. To this end a structured approach is presented to find suitable component code configurations, as well as interleavers. As a result the proposed turbo codes possess low error floors and outperform competing binary low-density parity-check (LDPC) codes by approximately 0.9dB and state-of-the-art binary turbo codes by 0.4dB at a code word error rate (CER) of about 10^{-7}. The loss w.r.t to the random coding bound (RCB) is only about 0.8dB.

Item URL in elib:https://elib.dlr.de/111941/
Document Type:Conference or Workshop Item (Speech)
Title:Turbo Code Design for Short Blocks
Authors:
AuthorsInstitution or Email of AuthorsAuthors ORCID iD
Jerkovits, ThomasThomas.Jerkovits (at) dlr.deUNSPECIFIED
Matuz, BalazsBalazs.Matuz (at) dlr.deUNSPECIFIED
Date:2016
Refereed publication:Yes
Open Access:Yes
Gold Open Access:No
In SCOPUS:No
In ISI Web of Science:No
Status:Published
Keywords:parallel turbo code;machine to machine;short block;error floor;telecommand;code matched interleaver;DRP interleaver
Event Title:ASMS 2016
Event Location:Palma de Mallorca, Spain
Event Type:international Conference
Event Dates:5-7 Sep 2016
HGF - Research field:Aeronautics, Space and Transport
HGF - Program:Space
HGF - Program Themes:Communication and Navigation
DLR - Research area:Raumfahrt
DLR - Program:R KN - Kommunikation und Navigation
DLR - Research theme (Project):R - Vorhaben Multimedia Satellitennetze
Location: Oberpfaffenhofen
Institutes and Institutions:Institute of Communication and Navigation
Deposited By: Jerkovits, Thomas
Deposited On:27 Apr 2017 10:19
Last Modified:31 Jul 2019 20:09

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