Methoden zur Bildsegmentation und zum Connected Component Labeling auf einem FPGA für eine zukünftige On-Board Bilddatenverarbeitung

Kurzfassung

The concept of the current generation of remote sensing satellites, is to send raw image data to the ground. Due to the extremely high volume of the image data, transmission capacity is a bottleneck. Also there is a high latency between image acquisition and the delivery of the product data, which can be in the range of several hours. This can be a real restriction for time critical applications, as disaster recognition. By performing data analysis directly after the image acquisition on board, the satellite useless data can be filtered out and time critical information can be delivered to the customer within a few minutes. The downside of this concept is that image processing has to be performed on board of the satellite. Many image processing steps are compu- tationally too intensive for a software implementation on the on-board computer. One possible solution is the implementation of these demanding processing steps on a special computing unit, called field-programmable gate array (FPGA). If a processing step is suitable for an FPGA implementation, high performance and low power consumption can be provided. In this work a high-performance FPGA implementation of image segmentation, including connected-component labeling (CCL), is presented. Especially two processing algorithms, the gap-smoothing algorithm and the two-pass single storage CCL (TPSS-CCL) method, which are the main components of the process chain, are explained in detail. The gap- smoothing algorithm is a edge preserving smoothing filter, that can handle heavy image noise. The TPSS-CCL is a special memory efficient implementation of the classical two- pass connected-component labeling method, able to process images without restrictions in complexity and the number of connected components. Both filters have been specially designed delivering high performance on an FPGA and are able to process large complex image data. The performance of the FPGA implementations of these algorithms have been studied in detail. Also the the hardware requirements for the implementations are presented. The second part of this work focuses on the evaluation of segmentation quality. An accurate, an objective and an good to interpret method for measuring the quality of segmentation methods is presented. The measurement process is based on the new developed SA_EQ metric. This metric is able to determine the difference between image segmentations. With SAEQ the qualitative performance of the segmentation process, presented in this work, has been studied in detail. Finally a comparison with different segmentation methods is presented.