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Generating Good Properties from a Small Number of Use Cases

Malburg, Jan and Flenker, Tino and Fey, Görschwin (2016) Generating Good Properties from a Small Number of Use Cases. IEEE International Verification and Security Workshop, 4.-6. Juli 2016, Sant Feliu de Guixols, Spanien.

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Abstract

The final design of today’s ICs is in many cases created by combining functional blocks from various vendors or reusing them from previous projects. Often only partial information about the internal behavior of such blocks is available. One way to describe the behavior of a functional block are formal properties. The advantage of properties in comparison to informal specifications is that they are precise and can be handled by tools. We present a technique to automatically generate SystemVerilog-Assertions from designs using dynamic dependency graphs. The dynamic dependency graphs are created from a set of predefined or automatically generated use cases. Using the dynamic dependency graph we compute the conditions under which specific outputs are observable. By this, we extract relations between signals of the design using only a few simulation runs, which drastically reduces the required number of use cases compared to other approaches. We abstract from the concrete values in the use cases using symbolic values and merging the temporal behavior of similar conditions. In the end, a modelchecker verifies the correctness of the generated properties

Item URL in elib:https://elib.dlr.de/105973/
Document Type:Conference or Workshop Item (Speech)
Title:Generating Good Properties from a Small Number of Use Cases
Authors:
AuthorsInstitution or Email of AuthorsAuthors ORCID iD
Malburg, JanUNSPECIFIEDUNSPECIFIED
Flenker, TinoUNSPECIFIEDUNSPECIFIED
Fey, GörschwinUNSPECIFIEDUNSPECIFIED
Date:2016
Refereed publication:Yes
Open Access:No
Gold Open Access:No
In SCOPUS:No
In ISI Web of Science:No
Status:Published
Keywords:Electronic Design Automation, Design Understanding, Property Generation, Simulation based, Dataflow-analysis
Event Title:IEEE International Verification and Security Workshop
Event Location:Sant Feliu de Guixols, Spanien
Event Type:Workshop
Event Dates:4.-6. Juli 2016
Organizer:IEEE
HGF - Research field:Aeronautics, Space and Transport
HGF - Program:Space
HGF - Program Themes:Space Technology
DLR - Research area:Raumfahrt
DLR - Program:R SY - Technik für Raumfahrtsysteme
DLR - Research theme (Project):R - Core Avionics, R - Systemtechnologien, R - Small Sat Kleinsatelliten (old)
Location: Bremen
Institutes and Institutions:Institute of Space Systems > Avionics Systems
Deposited By: Mörz, Martina
Deposited On:08 Sep 2016 09:49
Last Modified:18 Oct 2017 11:23

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