Timing Prediction of Deep Neural Networks on Multi-Core Platforms with Memory Hierarchy Effects

Kurzfassung

In the domain of edge computing, the implementation of Deep Neural Networks (DNNs) on small, resources-limited platforms is difficult. In order to optimize the inference of such systems, performance estimation is required. In that context, we propose a novel evaluation flow for mapping a DNN on embedded multi-core CPU devices. Our main contribution is to take into consideration the effect of a complex memory hierarchy on the computation time. The proposed framework is based on a SystemC simulation and calibrated with samples collected on a prototype.